Physical Design Methodology Engineer, AI HW IP
$100k - $500k • Austin, Texas, United States; Belgrade, Serbia; Toronto, Ontario, Canada • Full-time
Posted 2mo ago
This job has been open for more than 60 days. It may no longer be actively hiring, so check with the company before putting a lot into an application.
Job Location
Austin, Texas, United States; Belgrade, Serbia; Toronto, Ontario, Canada
Tech Stack
Remote Work Policy
On-site
Employment Type
Full-time
Categories
Machine Learning Engineer
About the job
Tenstorrent is seeking a Physical Design Methodology Engineer to develop, deploy, and own the RTL-to-GDSII methodology for their AI hardware IP team. This role is crucial for ensuring that new blocks, nodes, or customer variants can start from a working flow, rather than a cold start. The ideal candidate will be automation-minded, focused on removing manual steps and making PPA exploration repeatable, and will leverage AI, including LLMs and ML-driven optimization, in their flow development. This is a hybrid role based in Toronto, Austin, or Belgrade, and the company welcomes candidates at various experience levels.
Responsibilities
- Develop, deploy, and own the RTL-to-GDSII methodology for IP physical design.
- Build and scale EDA automation for AI accelerators and high-performance CPUs.
- Optimize physical design flows using ML-driven techniques and custom CAD development.
- Partner with design teams and EDA vendors to improve methodologies.
- Document flows clearly for others to use.
- Qualify new EDA releases and stand up flows for new technology nodes, PDKs, or foundry targets.
Requirements
- 5+ years of experience developing and supporting physical design methodology or CAD flows in production use.
- Expertise with industry-standard tools like FusionCompiler/ICC2, Innovus/Genus, PrimeTime, RedHawk.
- Proficiency in scripting languages such as Tcl, Python, and Perl.
- Deep understanding of advanced node methodology, low-power intent (UPF/CPF), clock tree synthesis, and signoff (EM/IR, DRC/LVS).
- Experience building flows for new technology nodes, PDKs, or foundry targets.
- Ability to partner effectively with design teams and EDA vendors.
- Strong documentation skills.
Benefits
- Highly competitive compensation package
- Variable compensation targets
- Benefits package