SystemVerilog Jobs

SambaNova is seeking a Principal Design Verification Engineer to take ownership of the verification for their next-generation RDU, the core silicon powering their machine learning and AI systems. This senior individual contributor role involves defining the test plan, testbench architecture, coverage model, and sign-off criteria. You will also play a key part in shaping the team's infrastructure, reuse strategies, and overall verification practices. You will collaborate closely with principal engineers from design, architecture, compiler, and runtime teams, leveraging their experience to verify the chip against production ML workloads.

$180k - $255k

OpenAI

We’re hiring a Research Engineer to help OpenAI models solve chip-design problems through reinforcement learning, tool use, and evaluation. You’ll own experiments from the initial idea through implementation and analysis, building environments and evaluations, running training, investigating failures, and using the results to decide what to try next. You’ll also build the software needed to make those experiments reliable and reproducible. We value strong coding fundamentals, careful experimental judgment, and the ability to make progress independently. Prior chip-design experience is helpful, but you can learn the domain alongside the team’s hardware specialists.

$380k - $500k

Etched is building hardware for frontier intelligence, focusing on inference. We are seeking a Design Verification Engineer to join our Internal IP DV team. You will be responsible for ensuring the custom IPs powering our chips, including systolic arrays, DMA engines, and NoCs, are robust, high-performance, and silicon-ready. This role requires creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.

$150k - $350k

Etched is building hardware for frontier intelligence, focusing on inference. We are seeking a Design Verification Engineer to join our Internal IP DV team. You will be responsible for ensuring the custom IPs powering our chips, including systolic arrays, DMA engines, and NoCs, are robust, high-performance, and silicon-ready. This role requires creativity, deep technical ability, and the drive to tackle complex verification challenges. You will collaborate with architects, RTL designers, and SW/FW/emulation teams to validate correctness and performance across the full hardware-software stack.

$150k - $350k