Senior Verification Engineer
$168k - $311k • US, CA, Santa Clara
Posted 11d ago
Job Location
US, CA, Santa Clara
Tech Stack
Remote Work Policy
On-site
Categories
Machine Learning Engineer
About the job
NVIDIA is seeking a Senior Verification Engineer to join their Display Team, focusing on verifying the world's foremost GPU and SoC display engines. In this role, you will collaborate with Architects and ASIC Engineers to own testplan development, verification sign-off, and infrastructure. The goal is to deliver high-quality IPs that power NVIDIA products across various markets, including consumer, professional, automotive, and AI. You will leverage agentic AI to enhance efficiency in tasks like testplan development, automation, and debug.
Responsibilities
- Define verification scope, develop and drive testplans (functional and performance), and build scalable UVM-based infrastructure.
- Leverage agentic AI to automate repetitive tasks, accelerate debug, and sharpen team efficiency.
- Develop UVM testbenches and checkers.
- Work with C/C++-based testbenches and debug reference models and designs developed in HLS.
- Track metrics and drive coverage closure.
- Critically reason through architectural solutions and partner with architects to develop well-crafted, silicon-proven designs.
- Collaborate across NVIDIA sites globally and work closely with external partners and customers to deploy verification flows.
- Ensure consistent display IP behavior across diverse tool stacks.
- Debug complex integration issues across organizational boundaries.
Requirements
- BS/MS in Electrical Engineering, Computer Engineering, Computer Science, or related field (or equivalent experience).
- 10+ years of relevant experience.
- Strong hands-on expertise in UVM, SystemVerilog, Verilog, Python, and C/C++.
- Passion for root-causing complex issues.
- Experience with constrained-random stimulus, functional coverage, assertion-based verification, and C/C++-based testbenches.
- Proficiency with industry EDA tools (VCS, Verdi/Debussy, GDB).
- Strong software engineering practices: clean, maintainable code; version control; code review.
- Domain knowledge of display pipelines: protocols (DisplayPort, HDMI, MIPI DSI/CSI), MMU interaction with ISO clients, and system low-power features (clock gating, power domains, retention, entry/exit sequences).
- Self-starter who dives into unfamiliar sub-blocks independently.
- Communicates with clarity across time zones and organizational boundaries.
- Embraces agentic AI to solve daily engineering challenges and multiply team output.
Benefits
- Equity
- Benefits