Research Engineer, Chip Design RL
$500k - $850k • San Francisco, CA
Posted 18h ago
Job Location
San Francisco, CA
Tech Stack
Remote Work Policy
On-site
Categories
AI Research Engineer
About the job
Anthropic is seeking a Research Engineer for its Code RL team, focused on advancing AI models for silicon design. This role involves leveraging chip design expertise to create tasks and signals for AI models, aiming to improve their capabilities in areas like RTL generation, design verification, and physical design optimization. The position sits at the intersection of cutting-edge research and engineering, with a commitment to building high-quality, scalable AI systems.
Responsibilities
- Invent, design, and implement RL environments and evaluations for agentic RTL generation, design verification, and physical design optimization.
- Work on cross-cutting RL considerations such as EDA-tool latency optimization and proxy rewards.
- Conduct experiments and shape the team's roadmap.
- Deliver work into research and production training runs.
- Collaborate with researchers and engineers across Anthropic.
Requirements
- Expertise in ASIC or FPGA design, including RTL, design verification (UVM, formal methods, coverage-driven), physical design (synthesis, place-and-route, timing closure), PPA optimization, DFT, and ECOs.
- Fluency with industry EDA tools and processes.
- Experience with chip tape-outs from specification to silicon.
- Ability to balance research exploration with engineering implementation.
- Passion for AI's potential and commitment to developing safe and beneficial systems.
- Experience with reinforcement learning, evaluations, or environments.
- Experience building tooling or automation around chip design flows.
- Experience working on ML accelerators or high-performance compute hardware.
- Familiarity with high-level synthesis or architecture simulators.
Benefits
- Annual compensation range: $500,000 - $850,000 USD
- Visa sponsorship available