RISC-V AI / HPC & Agentic Software Engineering Lead
$100k - $500k • Remote • Santa Clara, California, United States
Posted 23d ago
Job Location
Santa Clara, California, United States
Tech Stack
Remote Work Policy
Fully remote
Categories
AI Agent Engineer
About the job
Tenstorrent is seeking a RISC-V AI / HPC & Agentic Software Engineering Lead to work at the hardware-software boundary, enabling AI, HPC, and agentic AI software stacks on Tenstorrent’s RISC-V processors. This role involves integrating and optimizing Tenstorrent’s LLK (Low-Level Kernel) infrastructure for CPU execution and leading the bring-up of a RISC-V-native agentic AI software stack. You will collaborate closely with CPU architects, microarchitecture teams, compiler engineers, and AI kernel developers to ensure tight alignment between software capabilities and RISC-V architectural features. This is a remote position based out of North America.
Responsibilities
- Integrate and optimize Tenstorrent’s LLK infrastructure for CPU execution.
- Lead the bring-up of a RISC-V-native agentic AI software stack, including runtime orchestration, distributed execution frameworks, memory systems, and developer tools.
- Work closely with CPU architects, microarchitecture teams, compiler engineers, and AI kernel developers.
- Translate performance targets into architectural and software requirements.
- Optimize performance-critical code paths.
- Scale next-generation AI infrastructure.
Requirements
- Systems-oriented software engineering experience with deep experience in HPC and AI software stacks.
- Experience with distributed AI systems, orchestration frameworks, or agentic AI architectures.
- Comfortable working close to hardware and instruction-level programming.
- Experience in runtime systems, profiling, and low-level optimization.
- Strong background in HPC and AI software development.
- Solid understanding of RISC-V architecture (ISA, extensions, micro-architectural implications).
- Proficiency in C/C++ and systems programming.
- Familiarity with compiler toolchains (LLVM, GCC).
- Experience with vectorization, custom ISA extensions, or accelerator integration.
Benefits
- Highly competitive compensation package