Senior System Integration and Validation Engineer
$168k - $311k • US, CA, Santa Clara
Posted 26d ago
Job Location
US, CA, Santa Clara
Tech Stack
Remote Work Policy
On-site
Categories
Machine Learning Engineer
About the job
The Silicon Co-Design Group (SCG) is at the forefront of chip development, spanning architecture, design, marketing, operations, and productization across various markets including Datacenter, Gaming, Robotics, and Automotive. We are seeking a Senior Engineer to lead system validation, debug, and cross-functional alignment for critical silicon programs. This role is pivotal in ensuring product quality by identifying and resolving complex issues before they reach customers, and by building robust, AI-enabled validation capabilities. Your work will directly impact product success, escape rates, and customer confidence.
Responsibilities
- Own end-to-end system validation for NVIDIA GPU, SoC, and platform programs, including feature checks, PVT stress, system-stress campaigns, and fleet testing.
- Lead debug efforts for complex cross-stack issues involving logic, signal integrity, power delivery, firmware, and software, driving them to root cause with reusable solutions.
- Develop test plans, scripts, and automation for next-generation chips, translating architectural requirements into executable test coverage.
- Design and deploy AI-enabled debug and validation workflows with explicit guardrails and measurable impact on cycle time and debug velocity.
- Translate complex silicon and system risks into clear, actionable options for technical and executive audiences.
- Partner with globally distributed teams across silicon design, DFT, firmware, software, manufacturing, and platform engineering.
- Lead crisis-mode debug task forces and convert learnings into reusable methodologies for other programs.
Requirements
- BTech/BE or MTech/ME in Electronics, Electrical, or Computer Engineering (or equivalent experience).
- 8+ years of post-silicon validation, system integration, or platform debug experience on shipped GPU, CPU, or SoC products.
- Hands-on debug experience across silicon, board, and software boundaries, including logic design, signal integrity, power delivery, high-speed I/O, and PVT behavior.
- Strong EE fundamentals in SI/PI, power delivery, and thermal management, with a working understanding of GPU, CPU, or SoC architecture.
- Demonstrated experience in taking ambiguous, multi-team failures to root-cause closure with productized fixes.
- Proven track record of leading a project team through a crisis with owned decision points.
- Demonstrated experience building or scaling AI-driven validation workflows with adoption beyond personal use and measurable impact.
Benefits
- Equity
- Flexible time off
- Continuous learning opportunities
- Competitive benefits