Senior SoC Architect, RAS
US, CA, Santa Clara
Posted 1mo ago
Job Location
US, CA, Santa Clara
Tech Stack
Remote Work Policy
On-site
Categories
Machine Learning Engineer
About the job
We are seeking a Senior Hardware Architect to focus on Reliability, Availability, and Serviceability (RAS) for our Tegra System-on-Chips (SoCs). This role offers the chance to contribute to the AI revolution by defining resilient computing platforms for datacenters, autonomous vehicles, and edge systems. You will be instrumental in defining, driving, and delivering RAS hardware architecture across advanced CPUs and SoCs, guiding features from initial concepts through design, verification, validation, and production readiness. This is an opportunity to make a significant impact in a technology-driven company, working with world-class teams to enhance system resiliency, observability, debuggability, and serviceability.
Responsibilities
- Define and drive SoC-level RAS hardware architecture across CPUs, interconnects, memory systems, IOs, safety islands, firmware interfaces, and platform components.
- Own RAS features throughout the full development lifecycle, from concept to production readiness.
- Develop architectural requirements for fault detection, correction, containment, isolation, telemetry, error reporting, recovery, graceful degradation, serviceability, and diagnostic observability.
- Collaborate with design, verification, validation, firmware, software, and platform teams to ensure RAS features are implementable and aligned with system requirements.
- Analyze the interaction of RAS mechanisms with performance, power, clocking, memory hierarchy, and firmware/software interfaces.
- Create hardware specifications, architectural requirements, error-handling flows, and design guidance.
- Develop architectural models using SystemC, C/C++, or Python.
- Plan and review verification and validation strategies for RAS mechanisms, including fault injection and resiliency modeling.
- Assist in failure analysis and silicon debug, developing diagnostic methods for various failure types.
- Apply RAS architecture principles to high-reliability environments, including space and radiation-aware use cases.
- Follow industry standards and best practices for RAS, functional safety, and semiconductor reliability.
- Patent novel hardware architecture techniques that improve system resiliency and serviceability.
Requirements
- MS or PhD in computer engineering, electrical engineering, or equivalent experience.
- 8+ years of experience in SoC architecture, design, verification, reliability, silicon validation, or related hardware development.
- Strong understanding of SoC RAS principles, including fault detection, correction, containment, telemetry, recovery, and serviceability.
- Experience driving hardware architecture features through the full development lifecycle.
- Strong understanding of overall SoC architecture and its various components.
- Expertise in at least one SoC architecture area such as RAS, safety, debug, clocks, resets, interconnects, or memory controllers.
- Hands-on experience with design verification, silicon validation, fault injection, or reliability validation methodologies.
- Familiarity with radiation effects and high-reliability deployment environments is valued.
- Excellent analytical, written, and verbal communication skills.
- Ability to work effectively across cross-functional teams.